@ ian.maw：“你知道为什么我们会在配置后看到INIT网上的+ 1.8V吗？”
如果BitGen中的“未使用的IOB引脚”选项设置为“PULLDOWN”，那么配置后引脚上将有一个内部下拉。
数据表给出了3.3V VCCO下拉脉冲的200-550微安范围。
这看起来与你所看到的1.8V一致。
请参阅第5页的Irpd和Irpu规范：
http://www.xilinx.com/support/documentation/data_sheets/ds162.pdf
布赖恩
附：
IIRC S6 HSWAPEN引脚控制在配置之前I / O引脚是否上拉。
以上来自于谷歌翻译
以下为原文
@ian.maw : "Do you have any idea why we would see the +1.8V on the INIT net after configuration please ?"
If the "Unused IOB pins" option in BitGen is set to "PULLDOWN", there, there will be an internal pulldown on the pin after configuration.
The datasheet gives a range of 200-550 microamps for the pulldowns at 3.3V VCCO.
This seems in line with the 1.8V you are seeing.
See the Irpd and Irpu specs on page 5 of:
http://www.xilinx.com/support/documentation/data_sheets/ds162.pdf
-Brian
p.s. IIRC the S6 HSWAPEN pin controls whether the I/O pins are pulled UP before configuration.
@ ian.maw：“你知道为什么我们会在配置后看到INIT网上的+ 1.8V吗？”
如果BitGen中的“未使用的IOB引脚”选项设置为“PULLDOWN”，那么配置后引脚上将有一个内部下拉。
数据表给出了3.3V VCCO下拉脉冲的200-550微安范围。
这看起来与你所看到的1.8V一致。
请参阅第5页的Irpd和Irpu规范：
http://www.xilinx.com/support/documentation/data_sheets/ds162.pdf
布赖恩
附：
IIRC S6 HSWAPEN引脚控制在配置之前I / O引脚是否上拉。
以上来自于谷歌翻译
以下为原文
@ian.maw : "Do you have any idea why we would see the +1.8V on the INIT net after configuration please ?"
If the "Unused IOB pins" option in BitGen is set to "PULLDOWN", there, there will be an internal pulldown on the pin after configuration.
The datasheet gives a range of 200-550 microamps for the pulldowns at 3.3V VCCO.
This seems in line with the 1.8V you are seeing.
See the Irpd and Irpu specs on page 5 of:
http://www.xilinx.com/support/documentation/data_sheets/ds162.pdf
-Brian
p.s. IIRC the S6 HSWAPEN pin controls whether the I/O pins are pulled UP before configuration.
举报
举报
