用DMA链表 头尾相接
2个buffer进行乒乓
stc_dma_llp_descriptor_t AudioDmaLLP[2] = {
{
.SARx = (uint32_t)(&Sin1K32767[0]),
.DARx = (uint32_t)(&I2S_CH->TXBUF),
.DTCTLx_f.CNT = 960,
.DTCTLx_f.BLKSIZE = 1,
.LLPx = (uint32_t)(&AudioDmaLLP[1]),
.CHxCTL_f.SINC = AddressIncrease,
.CHxCTL_f.DINC = AddressFix,
.CHxCTL_f.HSIZE = Dma16Bit,
.CHxCTL_f.LLPEN = Enable,
.CHxCTL_f.LLPRUN = LlpWaitNextReq,
.CHxCTL_f.IE = Enable,
},
{
.SARx = (uint32_t)(&Sin1K32767[0]),
.DARx = (uint32_t)(&I2S_CH->TXBUF),
.DTCTLx_f.CNT = 960,
.DTCTLx_f.BLKSIZE = 1,
.LLPx = (uint32_t)(&AudioDmaLLP[0]),
.CHxCTL_f.SINC = AddressIncrease,
.CHxCTL_f.DINC = AddressFix,
.CHxCTL_f.HSIZE = Dma16Bit,
.CHxCTL_f.LLPEN = Enable,
.CHxCTL_f.LLPRUN = LlpWaitNextReq,
.CHxCTL_f.IE = Enable,
}};
static void I2S2_DMATxCplt(void)
{
rt_interrupt_enter(); /* enter interrupt */
DMA_ClearIrqFlag(DMA_UNIT, DMA_CH, TrnCpltIrq);
if (BufferEndCallBack && BufferEndParam)
{
uint32_t index;
if (DMA_UNIT->LLP2 == (uint32_t)&AudioDmaLLP[0])
{
index = 1;
}
else
{
index = 0;
}
BufferEndCallBack(BufferEndParam, index);
}
rt_interrupt_leave(); /* leave interrupt */
}
static void FirstDMAConfig(stc_dma_llp_descriptor_t *first)
{
stc_dma_config_t stcDmaCfg;
MEM_ZERO_STRUCT(stcDmaCfg);
/* Disable DMA1. */
// DMA_Cmd(DMA_UNIT, Disable);
DMA_ClearIrqFlag(DMA_UNIT, DMA_CH, BlkTrnCpltIrq);
DMA_ClearIrqFlag(DMA_UNIT, DMA_CH, TrnCpltIrq);
stcDmaCfg.u16BlockSize = 1u; // uint16
stcDmaCfg.u16TransferCnt = first->DTCTLx_f.CNT;
stcDmaCfg.u32SrcAddr = first->SARx;
stcDmaCfg.u32DesAddr = (uint32_t)(&I2S_CH->TXBUF);
stcDmaCfg.stcDmaChCfg.enLlpEn = Enable;
stcDmaCfg.stcDmaChCfg.enLlpMd = LlpWaitNextReq;
stcDmaCfg.u32DmaLlp = first->LLPx;
stcDmaCfg.stcDmaChCfg.enSrcRptEn = Disable;
stcDmaCfg.stcDmaChCfg.enDesRptEn = Disable;
stcDmaCfg.stcDmaChCfg.enSrcInc = AddressIncrease;
stcDmaCfg.stcDmaChCfg.enDesInc = AddressFix;
stcDmaCfg.stcDmaChCfg.enIntEn = Enable;
stcDmaCfg.stcDmaChCfg.enTrnWidth = Dma16Bit;
PWC_Fcg0PeriphClockCmd(PWC_FCG0_PERIPH_DMA1, Enable);
DMA_Cmd(DMA_UNIT, Enable);
DMA_InitChannel(DMA_UNIT, DMA_CH, &stcDmaCfg);
DMA_ChannelCmd(DMA_UNIT, DMA_CH, Enable);
PWC_Fcg0PeriphClockCmd(PWC_FCG0_PERIPH_AOS, Enable);
DMA_SetTriggerSrc(DMA_UNIT, DMA_CH, EVT_I2S2_TXIRQOUT);
stc_irq_regi_conf_t stcIrqRegiCfg;
MEM_ZERO_STRUCT(stcIrqRegiCfg);
stcIrqRegiCfg.enIRQn = I2S2_DMA_TXC_INT_IRQn;
stcIrqRegiCfg.pfnCallback = I2S2_DMATxCplt;
stcIrqRegiCfg.enIntSrc = I2S2_DMA_TXC_INT_NUM;
enIrqRegistration(&stcIrqRegiCfg);
NVIC_SetPriority(stcIrqRegiCfg.enIRQn, DDL_IRQ_PRIORITY_DEFAULT);
NVIC_ClearPendingIRQ(stcIrqRegiCfg.enIRQn);
NVIC_EnableIRQ(stcIrqRegiCfg.enIRQn);
}
用DMA链表 头尾相接
2个buffer进行乒乓
stc_dma_llp_descriptor_t AudioDmaLLP[2] = {
{
.SARx = (uint32_t)(&Sin1K32767[0]),
.DARx = (uint32_t)(&I2S_CH->TXBUF),
.DTCTLx_f.CNT = 960,
.DTCTLx_f.BLKSIZE = 1,
.LLPx = (uint32_t)(&AudioDmaLLP[1]),
.CHxCTL_f.SINC = AddressIncrease,
.CHxCTL_f.DINC = AddressFix,
.CHxCTL_f.HSIZE = Dma16Bit,
.CHxCTL_f.LLPEN = Enable,
.CHxCTL_f.LLPRUN = LlpWaitNextReq,
.CHxCTL_f.IE = Enable,
},
{
.SARx = (uint32_t)(&Sin1K32767[0]),
.DARx = (uint32_t)(&I2S_CH->TXBUF),
.DTCTLx_f.CNT = 960,
.DTCTLx_f.BLKSIZE = 1,
.LLPx = (uint32_t)(&AudioDmaLLP[0]),
.CHxCTL_f.SINC = AddressIncrease,
.CHxCTL_f.DINC = AddressFix,
.CHxCTL_f.HSIZE = Dma16Bit,
.CHxCTL_f.LLPEN = Enable,
.CHxCTL_f.LLPRUN = LlpWaitNextReq,
.CHxCTL_f.IE = Enable,
}};
static void I2S2_DMATxCplt(void)
{
rt_interrupt_enter(); /* enter interrupt */
DMA_ClearIrqFlag(DMA_UNIT, DMA_CH, TrnCpltIrq);
if (BufferEndCallBack && BufferEndParam)
{
uint32_t index;
if (DMA_UNIT->LLP2 == (uint32_t)&AudioDmaLLP[0])
{
index = 1;
}
else
{
index = 0;
}
BufferEndCallBack(BufferEndParam, index);
}
rt_interrupt_leave(); /* leave interrupt */
}
static void FirstDMAConfig(stc_dma_llp_descriptor_t *first)
{
stc_dma_config_t stcDmaCfg;
MEM_ZERO_STRUCT(stcDmaCfg);
/* Disable DMA1. */
// DMA_Cmd(DMA_UNIT, Disable);
DMA_ClearIrqFlag(DMA_UNIT, DMA_CH, BlkTrnCpltIrq);
DMA_ClearIrqFlag(DMA_UNIT, DMA_CH, TrnCpltIrq);
stcDmaCfg.u16BlockSize = 1u; // uint16
stcDmaCfg.u16TransferCnt = first->DTCTLx_f.CNT;
stcDmaCfg.u32SrcAddr = first->SARx;
stcDmaCfg.u32DesAddr = (uint32_t)(&I2S_CH->TXBUF);
stcDmaCfg.stcDmaChCfg.enLlpEn = Enable;
stcDmaCfg.stcDmaChCfg.enLlpMd = LlpWaitNextReq;
stcDmaCfg.u32DmaLlp = first->LLPx;
stcDmaCfg.stcDmaChCfg.enSrcRptEn = Disable;
stcDmaCfg.stcDmaChCfg.enDesRptEn = Disable;
stcDmaCfg.stcDmaChCfg.enSrcInc = AddressIncrease;
stcDmaCfg.stcDmaChCfg.enDesInc = AddressFix;
stcDmaCfg.stcDmaChCfg.enIntEn = Enable;
stcDmaCfg.stcDmaChCfg.enTrnWidth = Dma16Bit;
PWC_Fcg0PeriphClockCmd(PWC_FCG0_PERIPH_DMA1, Enable);
DMA_Cmd(DMA_UNIT, Enable);
DMA_InitChannel(DMA_UNIT, DMA_CH, &stcDmaCfg);
DMA_ChannelCmd(DMA_UNIT, DMA_CH, Enable);
PWC_Fcg0PeriphClockCmd(PWC_FCG0_PERIPH_AOS, Enable);
DMA_SetTriggerSrc(DMA_UNIT, DMA_CH, EVT_I2S2_TXIRQOUT);
stc_irq_regi_conf_t stcIrqRegiCfg;
MEM_ZERO_STRUCT(stcIrqRegiCfg);
stcIrqRegiCfg.enIRQn = I2S2_DMA_TXC_INT_IRQn;
stcIrqRegiCfg.pfnCallback = I2S2_DMATxCplt;
stcIrqRegiCfg.enIntSrc = I2S2_DMA_TXC_INT_NUM;
enIrqRegistration(&stcIrqRegiCfg);
NVIC_SetPriority(stcIrqRegiCfg.enIRQn, DDL_IRQ_PRIORITY_DEFAULT);
NVIC_ClearPendingIRQ(stcIrqRegiCfg.enIRQn);
NVIC_EnableIRQ(stcIrqRegiCfg.enIRQn);
}
举报