WICED CYW20719-B1如何减少GPIO输出电流泄漏

嗨队，
在配置了GPIO PIN（例如P13）为“GPIOIN输入，使能GPIOOUTPUtiON启用”和默认值设置为“GPIOPIN PosiOutPurthHig”，
然后，另一个MCU尝试控制配置的GPIO并将其作为输入到CYW20719-B1的地面，我们可以发现电流泄漏是~21.5毫安。
太高了。
因此，在不增加任何外部电阻器的情况下，有没有通过在内部配置FW来减少电流泄漏的方法，就像PSoC DO（例如配置为内部上拉输出）一样？
还有一个问题，所有的GPIO都有内拉电阻和下拉电阻吗？如果是的话，这些内部上拉和下拉电阻的确切值是多少？
谢谢，
杜德利



     以下为原文
  Hi Team,

After configured a GPIO pin (such as P13) as "GPIO_INPUT_ENABLE | GPIO_OUTPUT_ENABLE" and the default value set to "GPIO_PIN_OUTPUT_HIGH",
then another MCU tried to control the configured GPIO and put it down to the ground as an input to the CYW20719-B1, we can find that the current leak is ~21.5mA.
It's too high.
So, without adding any external resistors, is there any method to reduce the current leak by configuring in the FW internally, just as the PSoC do (such as configured as internal pull up output)?
And one more question, are there pull up and pull down internal resistors for all GPIO? if so, what is the exact value of these internal pull up and pull down resistors?

Thanks,
Dudley