在spartan-6 GTP中RXRECCLK的抖动是多少

我想知道在spartan-6 GTP中RXRECCLK的抖动是多少。
有没有文件描述这个问题？
我打算分发系统时钟，但我不知道从GTP的RX恢复时钟的性能。

我的想法是：我使用系统时钟（相当不错，抖动以下为原文

hi,
I wonder how much is the jitter of RXRECCLK in spartan-6 GTPs. is there any document describe this issue?

I am planning to distribute the system clock, but I don't know the performance of the recovery clock from RX of GTP.
My idea is: I use the system clock(pretty good, jitter < 0.5ps, 80.5MHz) as the REFCLK of GTP_TX in the loacal board,
then fanout the TX data to several receiver. every receiver recovery the clock. it should be 80.5MHz.

My question is how much is the jitter of the RXRECCLK? Are all these RXRECCLK in same phase?

thank you.

潘晶燕

2019-7-1 13:41:54

Y，
通常，如果您需要将接收时钟用于其他收发器，您可以通过使用适当的低通相位检测器滤波器时间常数通过外部PLL来清理它（Xilinx FPGA上的PLL不一定具有
适当的过滤要求）。
这个时钟的阶段并不重要。
如果分配接收时钟而不滤除抖动，则传输的抖动可能过大，并且使用该时钟源的所有链路都会产生数据错误 - 请勿这样做！
Austin Lesea主要工程师Xilinx San Jose

以上来自于谷歌翻译

以下为原文

y,

Typically, if you need to use the receive clock for other transceivers, you would clean it up by passing it through an external PLL with the proper low pass phase detector filter time constants (the PLL on the Xilinx FPGA is not necessarily going to have the proper filter requirements).

The phase of this clock is not important.

If you distribute the receive clock without filtering out the jitter, the transmitted jitter may be excessive, and data errors will result on all those links using that clock source -- don't do it that way!

Austin Lesea
Principal Engineer
Xilinx San Jose