谢谢您的回复。
是的,我已经完成了所有这些,尽管我忘了表明重要的一点...... SVF文件在影响方面表现良好。
它只适用于我尝试使用的第三方工具。
现在每个人的反应都是说它是第三方工具。
也许是这样,但是当我使用相同的过程,第三方工具和所有工作时,我很难用于其他2个部件,一个Xilinx和一个Altera。
我正在寻找的是Spartan3A的独特之处,它产生的SVF(例如与Virtex6生成的SVF相比),以及任何可能导致它在影响中起作用而不在其他地方起作用的东西。
此外,任何人都可以通过Spartan3A验证他们已经完成了这项工作,并且已经成功使用这种类型的SVF来玩除了影响之外的任何其他硬件/软件。
以下是我对状态寄存器内容的了解,来自Xilinx员工,我有状态寄存器报告:
在调查状态寄存器读取后,我可以看到GTS_CFG_B,GWE和GHIGH和DONE没有变高。
这表示启动顺序未完成(FF和BRam不可写,设备不接收整个配置比特流等)。
GHIGH低表示从未进入启动序列。
在将所有配置数据发送到FPGA之后,fpga全部配置好,然后GHIGH将被置位,告诉您进入启动序列。
此时,所有内容都保持在重置状态,并且IO保持在三态。
如果GHIGH永远不会发生,GTS和GWE也不会。
由于GHIGH很低,因此数据不好,您需要查看配置流的数据质量。
以上来自于谷歌翻译
以下为原文
Thank you for your reply.
Yes I have done all of this, allthough I forgot to indicate that important point...The SVF file plays fine in impact.
It only doesn't work with the 3rd party tool I am trying to use. Now everybody's reaction will be to say it is the 3rd party tool. Maybe so, but I have a hard time with that when the same exact process, 3rd party tool and all, works fine for 2 other parts, one Xilinx and One Altera.
What I'm looking for is whatever it could be that is unique about the Spartan3A and it's generated SVF (compared to a Virtex6 generated SVF for example), and anything that might cause it to work in impact but not elsewhere. Also anyone out there that can verify they have done this before with Spartan3A, have had success with this type of SVF to play on any other hardware/software besides impact.
Here is what I know about the status register contents, from a Xilinx employee to whom I have the status register report:
After investigating the status register read, I can see that GTS_CFG_B, GWE, and GHIGH and DONE are not going high. This indicates the startup sequence is not finished (FF and BRam is not writable, device does not receive entire config bitstream, etc etc). The GHIGH low indicates this never got to the startup sequence. After all the config data is sent into the FPGA, the fpga is all configured then GHIGH will get asserted, telling you to go into startup sequence. At this point everything is held in reset, and IOs are held in a tristate.
If GHIGH never occurs, GTS and GWE won't either.
Since GHIGH is low, it's bad data and you need to look at the data quality of the config stream.
谢谢您的回复。
是的,我已经完成了所有这些,尽管我忘了表明重要的一点...... SVF文件在影响方面表现良好。
它只适用于我尝试使用的第三方工具。
现在每个人的反应都是说它是第三方工具。
也许是这样,但是当我使用相同的过程,第三方工具和所有工作时,我很难用于其他2个部件,一个Xilinx和一个Altera。
我正在寻找的是Spartan3A的独特之处,它产生的SVF(例如与Virtex6生成的SVF相比),以及任何可能导致它在影响中起作用而不在其他地方起作用的东西。
此外,任何人都可以通过Spartan3A验证他们已经完成了这项工作,并且已经成功使用这种类型的SVF来玩除了影响之外的任何其他硬件/软件。
以下是我对状态寄存器内容的了解,来自Xilinx员工,我有状态寄存器报告:
在调查状态寄存器读取后,我可以看到GTS_CFG_B,GWE和GHIGH和DONE没有变高。
这表示启动顺序未完成(FF和BRam不可写,设备不接收整个配置比特流等)。
GHIGH低表示从未进入启动序列。
在将所有配置数据发送到FPGA之后,fpga全部配置好,然后GHIGH将被置位,告诉您进入启动序列。
此时,所有内容都保持在重置状态,并且IO保持在三态。
如果GHIGH永远不会发生,GTS和GWE也不会。
由于GHIGH很低,因此数据不好,您需要查看配置流的数据质量。
以上来自于谷歌翻译
以下为原文
Thank you for your reply.
Yes I have done all of this, allthough I forgot to indicate that important point...The SVF file plays fine in impact.
It only doesn't work with the 3rd party tool I am trying to use. Now everybody's reaction will be to say it is the 3rd party tool. Maybe so, but I have a hard time with that when the same exact process, 3rd party tool and all, works fine for 2 other parts, one Xilinx and One Altera.
What I'm looking for is whatever it could be that is unique about the Spartan3A and it's generated SVF (compared to a Virtex6 generated SVF for example), and anything that might cause it to work in impact but not elsewhere. Also anyone out there that can verify they have done this before with Spartan3A, have had success with this type of SVF to play on any other hardware/software besides impact.
Here is what I know about the status register contents, from a Xilinx employee to whom I have the status register report:
After investigating the status register read, I can see that GTS_CFG_B, GWE, and GHIGH and DONE are not going high. This indicates the startup sequence is not finished (FF and BRam is not writable, device does not receive entire config bitstream, etc etc). The GHIGH low indicates this never got to the startup sequence. After all the config data is sent into the FPGA, the fpga is all configured then GHIGH will get asserted, telling you to go into startup sequence. At this point everything is held in reset, and IOs are held in a tristate.
If GHIGH never occurs, GTS and GWE won't either.
Since GHIGH is low, it's bad data and you need to look at the data quality of the config stream.
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