怎么将吉他连接到Nexys 4 FPGA板？

petarj写道：
Aha，因此必须仔细设计高阻抗输入缓冲器以提供ESD保护，而不是连接到FPGA。
嗯，是的，因为一个常见的失败事件是当你将吉他插入你的设备并且你得到一个静态的消息。
我相信FPGA的输入将直接通过Nexys 4开发板上的XADC芯片，如果我错了，请纠正我？
我对这块电路板或它的功能一无所知，但一般的想法是输入缓冲器 - > ADC  - > FPGA。
另外，作为与Nexys 4 FPGA板上的XADC输入兼容的外部加密狗板，是否有任何随时可用的强大高阻抗输入缓冲器？
任何现成的FET输入运算放大器都可以工作，但您需要确保缓冲器输出不超过ADC的输入能力。
----------------------------是的，我这样做是为了谋生。
在原帖中查看解决方案



以下为原文

petarj wrote:
Aha, so the high-impedance input buffer has to be carefully designed as to provide ESD protection, which I than connect to the FPGA.

Well, yeah, because a common failure event is when you plug the guitar into your device and you get a static zap.

I believe the input to the FPGA would be through XADC chip directly on the Nexys 4 development board, correct me if I am wrong?

I know nothing about this board or its capabilities, but the general idea is input buffer -> ADC -> FPGA.

Also, would there be any readily availble robust high-impedance input buffer, as an external dongle board compatible with XADC input on the Nexys 4 FPGA board?

Any off-the-shelf FET-input op-amp will work, but you need to ensure that your buffer output doesn't exceed the ADC's input capability.
----------------------------Yes, I do this for a living.View solution in original post

petarj写道：
我有关于连接el的一般设计问题。
吉他到Nexys 4 FPGA板。我想创建吉他效果，基本处理el。
吉他信号和输出结果信号发送到扬声器。什么是最好的（强大，简单，快速......）连接el的方式。
吉他获取信号进行处理？
专注于Nexys 4 FPGA板。我对FPGA音频信号非常新鲜，因此我需要一些通用（或特定）指导。
您需要一个高阻抗输入缓冲器（以最大限度地减少拾取器上的负载），可能需要增益控制，以便为ADC供电，然后由FPGA读取。
----------------------------是的，我这样做是为了谋生。



以下为原文

petarj wrote:
I have a general design question about connecting an el. guitar to the Nexys 4 FPGA board.
I want to create guitar effects, basicaly process the el. guitar signal and output resulting signal to the speaker.

What would be the best (robust, easy, fast ...) way to connect an el. guitar to acquire the signal for processing? Focused on the Nexys 4 FPGA board.

I am quite fresh with FPGA audio signals, so that is why I need some general (or specific) guidance.

You need a high-impedance input buffer (to minimize loading on the pickups), possibly with gain control, to feed an ADC which is then read by the FPGA.
----------------------------Yes, I do this for a living.

还建议对电路板的输入提供强大的ESD保护，以保护电路免受静电冲击等的损坏。
- 鲍勃埃尔金德
签名：新手的自述文件在这里：http：//forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369总结：1。
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如果我写一篇好文章，那么我一无所获。



以下为原文

Also suggest robust ESD protection on inputs to the circuit board, to protect circuits from damage due to static shocks, etc.
 
-- Bob Elkind
SIGNATURE:
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Aha，因此必须仔细设计高阻抗输入缓冲器以提供ESD保护，而不是连接到FPGA。
我相信FPGA的输入将直接通过Nexys 4开发板上的XADC芯片，如果我错了，请纠正我？
另外，作为与Nexys 4 FPGA板上的XADC输入兼容的外部加密狗板，是否有任何随时可用的强大高阻抗输入缓冲器？



以下为原文

Aha, so the high-impedance input buffer has to be carefully designed as to provide ESD protection, which I than connect to the FPGA.
 
I believe the input to the FPGA would be through XADC chip directly on the Nexys 4 development board, correct me if I am wrong?
 
Also, would there be any readily availble robust high-impedance input buffer, as an external dongle board compatible with XADC input on the Nexys 4 FPGA board?